1. Field of the Invention
The present invention generally relates to semiconductor structures, and more particular to method for forming a semiconductor structure with an epitaxial layer, and the epitaxial layer does not contact others adjacent epitaxial layers.
2. Description of the Prior Art
With the trend in the industry being towards scaling down the size of metal oxide semiconductor transistors (MOS), three-dimensional or non-planar transistor technology, such as the fin field effect transistor technology (Fin FET) has been developed to replace planar MOS transistors. The three-dimensional structure of a fin FET increases the overlapping area between the gate and the fin-shaped structure of the silicon substrate, and, accordingly, the channel region is more effectively controlled. The drain-induced barrier lowering (DIBL) effect and short channel effect (SCE) are therefore reduced. The channel region is also longer under the same gate length, and thus the current between the source and the drain is increased.
In another aspect, in order to further improve device performance, a strained-silicon technology has also been developed. The main principle in the strained-silicon technology is that strains are applied to predetermined regions within the semiconductor device which in turn make the semiconductor device work better by enabling charge carriers, such as electrons or holes, to pass through the lattice of the channel more easily. In detail, one main technology generally used in the strained-silicon technology is to dispose epitaxial structures with lattice constants different from that of the crystal silicon in the source/drain regions of the semiconductor devices. The epitaxial structures are preferably composed of silicon germanium (SiGe), carbon-doped silicon (SiC) and so forth, which have lattice constants different from that of the crystal silicon. Since the epitaxial structures have lattice constants larger or smaller than that of the crystal silicon, carrier channel regions adjacent to those epitaxial structures could sense external stresses and both the lattice structure and the band structure within these regions are altered. As a result, the carrier mobility and the performances of the corresponding semiconductor devices are improved effectively.
However, along with the continuous decrease in the size and dimensions of the semiconductor devices, there are still some newly generated technological problems that need to be overcome, even though the non-planar transistor and the strained-silicon technology are already adopted. For example, two adjacent epitaxial structures within the semiconductor device often generate unwanted lattice defects on their interfaces. Therefore, how to effectively eliminate these defects and improve the performance of the semiconductor devices are important issues in this field.